HelenOS sources
CONTROL_REG_GEN_READ 71 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MIDR, c0, 0, c0, 0);
CONTROL_REG_GEN_READ 116 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CTR, c0, 0, c0, 1);
CONTROL_REG_GEN_READ 119 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TCMR, c0, 0, c0, 2);
CONTROL_REG_GEN_READ 125 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TLBTR, c0, 0, c0, 3);
CONTROL_REG_GEN_READ 129 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MPIDR, c0, 0, c0, 5);
CONTROL_REG_GEN_READ 130 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(REVIDR, c0, 0, c0, 6);
CONTROL_REG_GEN_READ 145 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_PFR0, c0, 0, c1, 0);
CONTROL_REG_GEN_READ 160 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_PFR1, c0, 0, c1, 1);
CONTROL_REG_GEN_READ 161 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_DFR0, c0, 0, c1, 2);
CONTROL_REG_GEN_READ 162 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_AFR0, c0, 0, c1, 3);
CONTROL_REG_GEN_READ 163 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR0, c0, 0, c1, 4);
CONTROL_REG_GEN_READ 164 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR1, c0, 0, c1, 5);
CONTROL_REG_GEN_READ 165 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR2, c0, 0, c1, 6);
CONTROL_REG_GEN_READ 166 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR3, c0, 0, c1, 7);
CONTROL_REG_GEN_READ 168 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR0, c0, 0, c2, 0);
CONTROL_REG_GEN_READ 169 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR1, c0, 0, c2, 1);
CONTROL_REG_GEN_READ 170 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR2, c0, 0, c2, 2);
CONTROL_REG_GEN_READ 171 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR3, c0, 0, c2, 3);
CONTROL_REG_GEN_READ 172 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR4, c0, 0, c2, 4);
CONTROL_REG_GEN_READ 173 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR5, c0, 0, c2, 5);
CONTROL_REG_GEN_READ 196 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0);
CONTROL_REG_GEN_READ 216 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1);
CONTROL_REG_GEN_READ 217 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */
CONTROL_REG_GEN_READ 224 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CSSELR, c0, 2, c0, 0);
CONTROL_REG_GEN_READ 226 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VPIDR, c0, 4, c0, 0);
CONTROL_REG_GEN_READ 228 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VMPIDR, c0, 4, c0, 5);
CONTROL_REG_GEN_READ 260 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SCTLR, c1, 0, c0, 0);
CONTROL_REG_GEN_READ 262 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ACTLR, c1, 0, c0, 1);
CONTROL_REG_GEN_READ 274 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CPACR, c1, 0, c0, 2);
CONTROL_REG_GEN_READ 290 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SCR, c1, 0, c1, 0);
CONTROL_REG_GEN_READ 292 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SDER, c1, 0, c1, 1);
CONTROL_REG_GEN_READ 302 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(NSACR, c1, 0, c1, 2);
CONTROL_REG_GEN_READ 306 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSCTLR, c1, 4, c0, 0);
CONTROL_REG_GEN_READ 308 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HACTLR, c1, 4, c0, 1);
CONTROL_REG_GEN_READ 311 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HCR, c1, 4, c1, 0);
CONTROL_REG_GEN_READ 313 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HDCR, c1, 4, c1, 1);
CONTROL_REG_GEN_READ 315 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HCPTR, c1, 4, c1, 2);
CONTROL_REG_GEN_READ 317 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSTR, c1, 4, c1, 3);
CONTROL_REG_GEN_READ 319 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HACR, c1, 4, c1, 7);
CONTROL_REG_GEN_READ 336 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR0, c2, 0, c0, 0);
CONTROL_REG_GEN_READ 340 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR1, c2, 0, c0, 1);
CONTROL_REG_GEN_READ 342 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBCR, c2, 0, c0, 2);
CONTROL_REG_GEN_READ 347 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTCR, c2, 4, c0, 2);
CONTROL_REG_GEN_READ 349 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VTCR, c2, 4, c1, 2);
CONTROL_REG_GEN_READ 353 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR0H, c2, 0, c2, 0);
CONTROL_REG_GEN_READ 355 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR1H, c2, 0, c2, 1);
CONTROL_REG_GEN_READ 357 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTTBRH, c2, 0, c2, 4);
CONTROL_REG_GEN_READ 359 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VTTBRH, c2, 0, c2, 6);
CONTROL_REG_GEN_READ 363 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DACR, c3, 0, c0, 0);
CONTROL_REG_GEN_READ 367 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DFSR, c5, 0, c0, 0);
CONTROL_REG_GEN_READ 369 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(IFSR, c5, 0, c0, 1);
CONTROL_REG_GEN_READ 372 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ADFSR, c5, 0, c1, 0);
CONTROL_REG_GEN_READ 374 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AIFSR, c5, 0, c1, 1);
CONTROL_REG_GEN_READ 377 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HADFSR, c5, 4, c1, 0);
CONTROL_REG_GEN_READ 379 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAIFSR, c5, 4, c1, 1);
CONTROL_REG_GEN_READ 381 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSR, c5, 4, c2, 0);
CONTROL_REG_GEN_READ 384 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DFAR, c6, 0, c0, 0);
CONTROL_REG_GEN_READ 386 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(IFAR, c6, 0, c0, 2);
CONTROL_REG_GEN_READ 389 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HDFAR, c6, 4, c0, 0);
CONTROL_REG_GEN_READ 391 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HIFAR, c6, 4, c0, 2);
CONTROL_REG_GEN_READ 393 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HPFAR, c6, 4, c0, 4);
CONTROL_REG_GEN_READ 439 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PAR, c7, 0, c4, 0); /* Security Extensions */
CONTROL_REG_GEN_READ 444 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PARH, c7, 0, c7, 0); /* PAE */
CONTROL_REG_GEN_READ 575 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCR, c9, 0, c12, 0);
CONTROL_REG_GEN_READ 581 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCNTENSET, c9, 0, c12, 1);
CONTROL_REG_GEN_READ 583 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCCNTR, c9, 0, c13, 0);
CONTROL_REG_GEN_READ 587 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */
CONTROL_REG_GEN_READ 589 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MAIR0, c10, 0, c2, 0); /* PAE */
CONTROL_REG_GEN_READ 591 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(NMRR, c10, 0, c2, 1); /* no PAE */
CONTROL_REG_GEN_READ 593 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MAIR1, c10, 0, c2, 1); /* PAE */
CONTROL_REG_GEN_READ 596 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AMAIR0, c10, 0, c3, 0); /* PAE */
CONTROL_REG_GEN_READ 598 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AMAIR1, c10, 0, c3, 1); /* PAE */
CONTROL_REG_GEN_READ 601 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HMAIR0, c10, 4, c2, 0);
CONTROL_REG_GEN_READ 603 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HMAIR1, c10, 4, c2, 1);
CONTROL_REG_GEN_READ 606 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAMAIR0, c10, 4, c3, 0);
CONTROL_REG_GEN_READ 608 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAMAIR1, c10, 4, c3, 1);
CONTROL_REG_GEN_READ 614 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VBAR, c12, 0, c0, 0);
CONTROL_REG_GEN_READ 616 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MVBAR, c12, 0, c0, 1);
CONTROL_REG_GEN_READ 619 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ISR, c12, 0, c1, 0);
CONTROL_REG_GEN_READ 621 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HVBAR, c12, 4, c0, 0);
CONTROL_REG_GEN_READ 625 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(FCSEIDR, c13, 0, c0, 0);
CONTROL_REG_GEN_READ 627 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CONTEXTIDR, c13, 0, c0, 1);
CONTROL_REG_GEN_READ 629 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRURW, c13, 0, c0, 2);
CONTROL_REG_GEN_READ 631 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRURO, c13, 0, c0, 3);
CONTROL_REG_GEN_READ 633 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRPRW, c13, 0, c0, 4);
CONTROL_REG_GEN_READ 636 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTPIDR, c13, 4, c0, 2);
CONTROL_REG_GEN_READ 640 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTFRQ, c14, 0, c0, 0);
CONTROL_REG_GEN_READ 642 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTKCTL, c14, 0, c1, 0);
CONTROL_REG_GEN_READ 645 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTP_TVAL, c14, 0, c2, 0);
CONTROL_REG_GEN_READ 647 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTP_CTL, c14, 0, c2, 1);
CONTROL_REG_GEN_READ 650 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTV_TVAL, c14, 0, c3, 0);
CONTROL_REG_GEN_READ 652 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTV_CTL, c14, 0, c3, 1);
CONTROL_REG_GEN_READ 655 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHCTL, c14, 4, c1, 0);
CONTROL_REG_GEN_READ 658 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHP_TVAL, c14, 4, c2, 0);
CONTROL_REG_GEN_READ 660 boot/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHP_CTL, c14, 4, c2, 1);
CONTROL_REG_GEN_READ 71 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MIDR, c0, 0, c0, 0);
CONTROL_REG_GEN_READ 116 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CTR, c0, 0, c0, 1);
CONTROL_REG_GEN_READ 119 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TCMR, c0, 0, c0, 2);
CONTROL_REG_GEN_READ 125 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TLBTR, c0, 0, c0, 3);
CONTROL_REG_GEN_READ 129 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MPIDR, c0, 0, c0, 5);
CONTROL_REG_GEN_READ 130 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(REVIDR, c0, 0, c0, 6);
CONTROL_REG_GEN_READ 145 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_PFR0, c0, 0, c1, 0);
CONTROL_REG_GEN_READ 160 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_PFR1, c0, 0, c1, 1);
CONTROL_REG_GEN_READ 161 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_DFR0, c0, 0, c1, 2);
CONTROL_REG_GEN_READ 162 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_AFR0, c0, 0, c1, 3);
CONTROL_REG_GEN_READ 163 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR0, c0, 0, c1, 4);
CONTROL_REG_GEN_READ 164 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR1, c0, 0, c1, 5);
CONTROL_REG_GEN_READ 165 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR2, c0, 0, c1, 6);
CONTROL_REG_GEN_READ 166 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR3, c0, 0, c1, 7);
CONTROL_REG_GEN_READ 168 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR0, c0, 0, c2, 0);
CONTROL_REG_GEN_READ 169 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR1, c0, 0, c2, 1);
CONTROL_REG_GEN_READ 170 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR2, c0, 0, c2, 2);
CONTROL_REG_GEN_READ 171 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR3, c0, 0, c2, 3);
CONTROL_REG_GEN_READ 172 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR4, c0, 0, c2, 4);
CONTROL_REG_GEN_READ 173 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR5, c0, 0, c2, 5);
CONTROL_REG_GEN_READ 196 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0);
CONTROL_REG_GEN_READ 216 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1);
CONTROL_REG_GEN_READ 217 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */
CONTROL_REG_GEN_READ 224 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CSSELR, c0, 2, c0, 0);
CONTROL_REG_GEN_READ 226 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VPIDR, c0, 4, c0, 0);
CONTROL_REG_GEN_READ 228 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VMPIDR, c0, 4, c0, 5);
CONTROL_REG_GEN_READ 260 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SCTLR, c1, 0, c0, 0);
CONTROL_REG_GEN_READ 262 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ACTLR, c1, 0, c0, 1);
CONTROL_REG_GEN_READ 274 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CPACR, c1, 0, c0, 2);
CONTROL_REG_GEN_READ 290 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SCR, c1, 0, c1, 0);
CONTROL_REG_GEN_READ 292 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(SDER, c1, 0, c1, 1);
CONTROL_REG_GEN_READ 302 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(NSACR, c1, 0, c1, 2);
CONTROL_REG_GEN_READ 306 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSCTLR, c1, 4, c0, 0);
CONTROL_REG_GEN_READ 308 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HACTLR, c1, 4, c0, 1);
CONTROL_REG_GEN_READ 311 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HCR, c1, 4, c1, 0);
CONTROL_REG_GEN_READ 313 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HDCR, c1, 4, c1, 1);
CONTROL_REG_GEN_READ 315 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HCPTR, c1, 4, c1, 2);
CONTROL_REG_GEN_READ 317 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSTR, c1, 4, c1, 3);
CONTROL_REG_GEN_READ 319 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HACR, c1, 4, c1, 7);
CONTROL_REG_GEN_READ 336 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR0, c2, 0, c0, 0);
CONTROL_REG_GEN_READ 340 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR1, c2, 0, c0, 1);
CONTROL_REG_GEN_READ 342 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBCR, c2, 0, c0, 2);
CONTROL_REG_GEN_READ 347 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTCR, c2, 4, c0, 2);
CONTROL_REG_GEN_READ 349 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VTCR, c2, 4, c1, 2);
CONTROL_REG_GEN_READ 353 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR0H, c2, 0, c2, 0);
CONTROL_REG_GEN_READ 355 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TTBR1H, c2, 0, c2, 1);
CONTROL_REG_GEN_READ 357 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTTBRH, c2, 0, c2, 4);
CONTROL_REG_GEN_READ 359 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VTTBRH, c2, 0, c2, 6);
CONTROL_REG_GEN_READ 363 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DACR, c3, 0, c0, 0);
CONTROL_REG_GEN_READ 367 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DFSR, c5, 0, c0, 0);
CONTROL_REG_GEN_READ 369 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(IFSR, c5, 0, c0, 1);
CONTROL_REG_GEN_READ 372 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ADFSR, c5, 0, c1, 0);
CONTROL_REG_GEN_READ 374 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AIFSR, c5, 0, c1, 1);
CONTROL_REG_GEN_READ 377 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HADFSR, c5, 4, c1, 0);
CONTROL_REG_GEN_READ 379 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAIFSR, c5, 4, c1, 1);
CONTROL_REG_GEN_READ 381 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HSR, c5, 4, c2, 0);
CONTROL_REG_GEN_READ 384 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(DFAR, c6, 0, c0, 0);
CONTROL_REG_GEN_READ 386 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(IFAR, c6, 0, c0, 2);
CONTROL_REG_GEN_READ 389 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HDFAR, c6, 4, c0, 0);
CONTROL_REG_GEN_READ 391 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HIFAR, c6, 4, c0, 2);
CONTROL_REG_GEN_READ 393 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HPFAR, c6, 4, c0, 4);
CONTROL_REG_GEN_READ 439 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PAR, c7, 0, c4, 0); /* Security Extensions */
CONTROL_REG_GEN_READ 444 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PARH, c7, 0, c7, 0); /* PAE */
CONTROL_REG_GEN_READ 575 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCR, c9, 0, c12, 0);
CONTROL_REG_GEN_READ 581 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCNTENSET, c9, 0, c12, 1);
CONTROL_REG_GEN_READ 583 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PMCCNTR, c9, 0, c13, 0);
CONTROL_REG_GEN_READ 587 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */
CONTROL_REG_GEN_READ 589 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MAIR0, c10, 0, c2, 0); /* PAE */
CONTROL_REG_GEN_READ 591 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(NMRR, c10, 0, c2, 1); /* no PAE */
CONTROL_REG_GEN_READ 593 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MAIR1, c10, 0, c2, 1); /* PAE */
CONTROL_REG_GEN_READ 596 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AMAIR0, c10, 0, c3, 0); /* PAE */
CONTROL_REG_GEN_READ 598 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(AMAIR1, c10, 0, c3, 1); /* PAE */
CONTROL_REG_GEN_READ 601 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HMAIR0, c10, 4, c2, 0);
CONTROL_REG_GEN_READ 603 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HMAIR1, c10, 4, c2, 1);
CONTROL_REG_GEN_READ 606 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAMAIR0, c10, 4, c3, 0);
CONTROL_REG_GEN_READ 608 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HAMAIR1, c10, 4, c3, 1);
CONTROL_REG_GEN_READ 614 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(VBAR, c12, 0, c0, 0);
CONTROL_REG_GEN_READ 616 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(MVBAR, c12, 0, c0, 1);
CONTROL_REG_GEN_READ 619 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(ISR, c12, 0, c1, 0);
CONTROL_REG_GEN_READ 621 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HVBAR, c12, 4, c0, 0);
CONTROL_REG_GEN_READ 625 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(FCSEIDR, c13, 0, c0, 0);
CONTROL_REG_GEN_READ 627 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CONTEXTIDR, c13, 0, c0, 1);
CONTROL_REG_GEN_READ 629 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRURW, c13, 0, c0, 2);
CONTROL_REG_GEN_READ 631 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRURO, c13, 0, c0, 3);
CONTROL_REG_GEN_READ 633 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(TPIDRPRW, c13, 0, c0, 4);
CONTROL_REG_GEN_READ 636 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(HTPIDR, c13, 4, c0, 2);
CONTROL_REG_GEN_READ 640 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTFRQ, c14, 0, c0, 0);
CONTROL_REG_GEN_READ 642 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTKCTL, c14, 0, c1, 0);
CONTROL_REG_GEN_READ 645 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTP_TVAL, c14, 0, c2, 0);
CONTROL_REG_GEN_READ 647 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTP_CTL, c14, 0, c2, 1);
CONTROL_REG_GEN_READ 650 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTV_TVAL, c14, 0, c3, 0);
CONTROL_REG_GEN_READ 652 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTV_CTL, c14, 0, c3, 1);
CONTROL_REG_GEN_READ 655 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHCTL, c14, 4, c1, 0);
CONTROL_REG_GEN_READ 658 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHP_TVAL, c14, 4, c2, 0);
CONTROL_REG_GEN_READ 660 kernel/arch/arm32/include/arch/cp15.h CONTROL_REG_GEN_READ(CNTHP_CTL, c14, 4, c2, 1);
CONTROL_REG_GEN_READ 71 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(MIDR, c0, 0, c0, 0);
CONTROL_REG_GEN_READ 116 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CTR, c0, 0, c0, 1);
CONTROL_REG_GEN_READ 119 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TCMR, c0, 0, c0, 2);
CONTROL_REG_GEN_READ 125 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TLBTR, c0, 0, c0, 3);
CONTROL_REG_GEN_READ 129 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(MPIDR, c0, 0, c0, 5);
CONTROL_REG_GEN_READ 130 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(REVIDR, c0, 0, c0, 6);
CONTROL_REG_GEN_READ 145 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_PFR0, c0, 0, c1, 0);
CONTROL_REG_GEN_READ 160 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_PFR1, c0, 0, c1, 1);
CONTROL_REG_GEN_READ 161 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_DFR0, c0, 0, c1, 2);
CONTROL_REG_GEN_READ 162 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_AFR0, c0, 0, c1, 3);
CONTROL_REG_GEN_READ 163 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR0, c0, 0, c1, 4);
CONTROL_REG_GEN_READ 164 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR1, c0, 0, c1, 5);
CONTROL_REG_GEN_READ 165 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR2, c0, 0, c1, 6);
CONTROL_REG_GEN_READ 166 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_MMFR3, c0, 0, c1, 7);
CONTROL_REG_GEN_READ 168 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR0, c0, 0, c2, 0);
CONTROL_REG_GEN_READ 169 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR1, c0, 0, c2, 1);
CONTROL_REG_GEN_READ 170 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR2, c0, 0, c2, 2);
CONTROL_REG_GEN_READ 171 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR3, c0, 0, c2, 3);
CONTROL_REG_GEN_READ 172 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR4, c0, 0, c2, 4);
CONTROL_REG_GEN_READ 173 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ID_ISAR5, c0, 0, c2, 5);
CONTROL_REG_GEN_READ 196 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0);
CONTROL_REG_GEN_READ 216 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1);
CONTROL_REG_GEN_READ 217 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */
CONTROL_REG_GEN_READ 224 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CSSELR, c0, 2, c0, 0);
CONTROL_REG_GEN_READ 226 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(VPIDR, c0, 4, c0, 0);
CONTROL_REG_GEN_READ 228 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(VMPIDR, c0, 4, c0, 5);
CONTROL_REG_GEN_READ 260 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(SCTLR, c1, 0, c0, 0);
CONTROL_REG_GEN_READ 262 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ACTLR, c1, 0, c0, 1);
CONTROL_REG_GEN_READ 274 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CPACR, c1, 0, c0, 2);
CONTROL_REG_GEN_READ 290 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(SCR, c1, 0, c1, 0);
CONTROL_REG_GEN_READ 292 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(SDER, c1, 0, c1, 1);
CONTROL_REG_GEN_READ 302 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(NSACR, c1, 0, c1, 2);
CONTROL_REG_GEN_READ 306 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HSCTLR, c1, 4, c0, 0);
CONTROL_REG_GEN_READ 308 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HACTLR, c1, 4, c0, 1);
CONTROL_REG_GEN_READ 311 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HCR, c1, 4, c1, 0);
CONTROL_REG_GEN_READ 313 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HDCR, c1, 4, c1, 1);
CONTROL_REG_GEN_READ 315 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HCPTR, c1, 4, c1, 2);
CONTROL_REG_GEN_READ 317 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HSTR, c1, 4, c1, 3);
CONTROL_REG_GEN_READ 319 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HACR, c1, 4, c1, 7);
CONTROL_REG_GEN_READ 336 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TTBR0, c2, 0, c0, 0);
CONTROL_REG_GEN_READ 340 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TTBR1, c2, 0, c0, 1);
CONTROL_REG_GEN_READ 342 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TTBCR, c2, 0, c0, 2);
CONTROL_REG_GEN_READ 347 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HTCR, c2, 4, c0, 2);
CONTROL_REG_GEN_READ 349 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(VTCR, c2, 4, c1, 2);
CONTROL_REG_GEN_READ 353 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TTBR0H, c2, 0, c2, 0);
CONTROL_REG_GEN_READ 355 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TTBR1H, c2, 0, c2, 1);
CONTROL_REG_GEN_READ 357 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HTTBRH, c2, 0, c2, 4);
CONTROL_REG_GEN_READ 359 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(VTTBRH, c2, 0, c2, 6);
CONTROL_REG_GEN_READ 363 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(DACR, c3, 0, c0, 0);
CONTROL_REG_GEN_READ 367 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(DFSR, c5, 0, c0, 0);
CONTROL_REG_GEN_READ 369 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(IFSR, c5, 0, c0, 1);
CONTROL_REG_GEN_READ 372 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ADFSR, c5, 0, c1, 0);
CONTROL_REG_GEN_READ 374 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(AIFSR, c5, 0, c1, 1);
CONTROL_REG_GEN_READ 377 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HADFSR, c5, 4, c1, 0);
CONTROL_REG_GEN_READ 379 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HAIFSR, c5, 4, c1, 1);
CONTROL_REG_GEN_READ 381 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HSR, c5, 4, c2, 0);
CONTROL_REG_GEN_READ 384 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(DFAR, c6, 0, c0, 0);
CONTROL_REG_GEN_READ 386 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(IFAR, c6, 0, c0, 2);
CONTROL_REG_GEN_READ 389 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HDFAR, c6, 4, c0, 0);
CONTROL_REG_GEN_READ 391 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HIFAR, c6, 4, c0, 2);
CONTROL_REG_GEN_READ 393 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HPFAR, c6, 4, c0, 4);
CONTROL_REG_GEN_READ 439 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PAR, c7, 0, c4, 0); /* Security Extensions */
CONTROL_REG_GEN_READ 444 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PARH, c7, 0, c7, 0); /* PAE */
CONTROL_REG_GEN_READ 575 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PMCR, c9, 0, c12, 0);
CONTROL_REG_GEN_READ 581 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PMCNTENSET, c9, 0, c12, 1);
CONTROL_REG_GEN_READ 583 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PMCCNTR, c9, 0, c13, 0);
CONTROL_REG_GEN_READ 587 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */
CONTROL_REG_GEN_READ 589 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(MAIR0, c10, 0, c2, 0); /* PAE */
CONTROL_REG_GEN_READ 591 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(NMRR, c10, 0, c2, 1); /* no PAE */
CONTROL_REG_GEN_READ 593 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(MAIR1, c10, 0, c2, 1); /* PAE */
CONTROL_REG_GEN_READ 596 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(AMAIR0, c10, 0, c3, 0); /* PAE */
CONTROL_REG_GEN_READ 598 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(AMAIR1, c10, 0, c3, 1); /* PAE */
CONTROL_REG_GEN_READ 601 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HMAIR0, c10, 4, c2, 0);
CONTROL_REG_GEN_READ 603 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HMAIR1, c10, 4, c2, 1);
CONTROL_REG_GEN_READ 606 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HAMAIR0, c10, 4, c3, 0);
CONTROL_REG_GEN_READ 608 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HAMAIR1, c10, 4, c3, 1);
CONTROL_REG_GEN_READ 614 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(VBAR, c12, 0, c0, 0);
CONTROL_REG_GEN_READ 616 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(MVBAR, c12, 0, c0, 1);
CONTROL_REG_GEN_READ 619 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(ISR, c12, 0, c1, 0);
CONTROL_REG_GEN_READ 621 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HVBAR, c12, 4, c0, 0);
CONTROL_REG_GEN_READ 625 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(FCSEIDR, c13, 0, c0, 0);
CONTROL_REG_GEN_READ 627 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CONTEXTIDR, c13, 0, c0, 1);
CONTROL_REG_GEN_READ 629 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TPIDRURW, c13, 0, c0, 2);
CONTROL_REG_GEN_READ 631 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TPIDRURO, c13, 0, c0, 3);
CONTROL_REG_GEN_READ 633 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(TPIDRPRW, c13, 0, c0, 4);
CONTROL_REG_GEN_READ 636 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(HTPIDR, c13, 4, c0, 2);
CONTROL_REG_GEN_READ 640 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTFRQ, c14, 0, c0, 0);
CONTROL_REG_GEN_READ 642 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTKCTL, c14, 0, c1, 0);
CONTROL_REG_GEN_READ 645 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTP_TVAL, c14, 0, c2, 0);
CONTROL_REG_GEN_READ 647 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTP_CTL, c14, 0, c2, 1);
CONTROL_REG_GEN_READ 650 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTV_TVAL, c14, 0, c3, 0);
CONTROL_REG_GEN_READ 652 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTV_CTL, c14, 0, c3, 1);
CONTROL_REG_GEN_READ 655 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTHCTL, c14, 4, c1, 0);
CONTROL_REG_GEN_READ 658 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTHP_TVAL, c14, 4, c2, 0);
CONTROL_REG_GEN_READ 660 uspace/lib/c/arch/arm32/include/libarch/cp15.h CONTROL_REG_GEN_READ(CNTHP_CTL, c14, 4, c2, 1);
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